COURSE UNIT TITLE

: EMBEDDED SYSTEM ARCHITECTURE

Description of Individual Course Units

Course Unit Code Course Unit Title Type Of Course D U L ECTS
MEC 5031 EMBEDDED SYSTEM ARCHITECTURE ELECTIVE 3 0 0 8

Offered By

Graduate School of Natural and Applied Sciences

Level of Course Unit

Second Cycle Programmes (Master's Degree)

Course Coordinator

ASSISTANT PROFESSOR ÖZGÜR TAMER

Offered to

Mechatronics Engineering
M.Sc. Mechatronics Engineering
Mechatronics Engineering

Course Objective

In this course, different architectures for embedded system design and applications will be given. Multi processor architectures will also be introduced. The students will also practice their knowledge on course projects.

Learning Outcomes of the Course Unit

1   To understand the special requirements that are imposed upon embedded systems
2   To understand the key features of embedded processors, particularly ARM and Nios II processors
3   To have the knowledge of special features of programming with embedded processors
4   To understand how architectural and implementation decisions influence performance and power dissipation
5   To understand how architectural and implementation decisions influence performance and power dissipation
6   To be able to write more efficient code for embedded systems
7   To understand the role of the compiler in the embedded system design process
8   To understand the properties of real-time operating systems, including real-time scheduling policies
9   To improve engineering system design and implementation techniques

Mode of Delivery

Face -to- Face

Prerequisites and Co-requisites

None

Recomended Optional Programme Components

None

Course Contents

Week Subject Description
1 Embedded processor architecture
2 Design programs for embedded systems
3 Introduction to Embedded systems
4 Program compilation and optimization techniques
5 Operating systems for embedded systems
6 Real-time scheduling policies
7 Interfacing peripherals to processors
8 Midterm
9 Introduction to multiprocessors; Design and implement a multi-core Nios II system
10 Design programs for multiprocessors
11 Conventional buses for embedded systems
12 Networks on Chip
13 Multiprocessor debugging and optimization
14 Design for low power/energy

Recomended or Required Reading

Computers as Components: Principles of Embedded Computing System Design, 2nd edition , by Wayne Wolf, Morgan Kaufmann, 2008

Planned Learning Activities and Teaching Methods

The issues of the course are given with presentations and experimental studies.

Assessment Methods

SORTING NUMBER SHORT CODE LONG CODE FORMULA
1 MTE MIDTERM EXAM
2 PRJ PROJECT
3 FIN FINAL EXAM
4 FCG FINAL COURSE GRADE MTE + PRJ/2 * 0.50 +FIN * 0.50
5 RST RESIT
6 FCGR FINAL COURSE GRADE (RESIT) MTE + PRJ/2 * 0.50 + RST * 0.50


*** Resit Exam is Not Administered in Institutions Where Resit is not Applicable.

Further Notes About Assessment Methods

The success of the students will be evaluated with one midterm exam, one project and one final exam.

Assessment Criteria

Homework,Mid-term examination, Term Project, Final examination.

Language of Instruction

English

Course Policies and Rules

To be announced.

Contact Details for the Lecturer(s)

Asst.Prof.Dr. Özgür Tamer,
email: ozgur.tamer@deu.edu.tr,
Tel: 0232 3017182

Office Hours

To be announced.

Work Placement(s)

None

Workload Calculation

Activities Number Time (hours) Total Work Load (hours)
Lectures 13 3 39
Design Project 2 10 20
Preparation for final exam 1 7 7
Preparation for midterm exam 1 7 7
Preparations before/after weekly lectures 12 10 120
Final 1 2 2
Midterm 1 2 2
TOTAL WORKLOAD (hours) 197

Contribution of Learning Outcomes to Programme Outcomes

PO/LOPO.1PO.2PO.3PO.4PO.5PO.6PO.7PO.8PO.9PO.10PO.11PO.12PO.13PO.14PO.15
LO.111324
LO.2222
LO.3332
LO.432
LO.5323
LO.6223
LO.732
LO.8232
LO.922