COURSE UNIT TITLE

: LOGIC DESIGN

DEGREE PROGRAMMES

Description of Individual Course Units

Course Unit Code Course Unit Title Type Of Course D U L ECTS
CME 1214 LOGIC DESIGN COMPULSORY 2 2 0 6

Offered By

Computer Engineering

Level of Course Unit

First Cycle Programmes (Bachelor's Degree)

Course Coordinator

ŞERIFE YILMAZ

Offered to

Computer Engineering

Course Objective

The aim of this course is to give fundamental digital electronics and analytical techniques used in digital logic to solve problems related to digital logic circuits.It is expected that students at the end of this course will be able to
understand of the basic structure and operation of a digital computer and Be able to design Digital Logic Circuits Using Gates and other simple Digital components..

Learning Outcomes of the Course Unit

1   Understand arithmetic in the various number systems
2   Apply to use Boolean Algebra to minimize the design of a logic circuit
3   Use Karnaugh maps to minimize the design of a logic circuit
4   Design combinational logic circuits
5   Design minimal finite-state machines
6   Design synchronous sequential counters
7   Design logic circuits using or implementing multiplexers, encoders, simple latches and flip-flops

Mode of Delivery

Face -to- Face

Prerequisites and Co-requisites

None

Recomended Optional Programme Components

None

Course Contents

Week Subject Description
1 Digital and analog quantities, Binary Digits, Logic Levels, Digital Waveforms, Basic Logic Operations and functions
2 Number Systems, Operations, Codes and Conversions
3 Logic Gates, Boolean Algebra and Logic Simplification
4 Implementing combinational logic, the universal property of NAND and NOR gates, operation with pulse waveforms.
5 Functions of Combinational Logic:Basic adders, parallel binary adders, comparators, decoders, encoders, code converters.
6 Multiplexers, demultiplexers, parity generators/checkers.
7 Review, Midterm Exam
8 Latches, Flip-Flops and operation characteristics of Flip-Flops.
9 Flip-Flops applications, Asynchronous and synchronous counter operation, Up/Down synchronous counters
10 Design of synchronous counters, cascaded counters, counter decoding and applications
11 Shift registers and applications
12 Algorithmic State Machines: ASM charts, State assignments, ASM tables
13 Syncronous Sequential Networks
14 Interfacing the digital and analog worlds, digitalto-analog (D/A) conversion, analog-to-digital (A/D) conversion

Recomended or Required Reading

Text Books:
Digital Fundamentals,Thomas L. FLOYD, Pearson Education,0-13-]97255-3,New Jersey,2006
Digital Fundamentals with VHDL,Thomas L. FLOYD, Prentice Hall,0-13-099527-4,New Jersey,2003

Reference Books:
Digital Principles and Design , Donald D. Givone, McGraw-Hill,0-07-119521-1, New York, 2003
Introduction to Logic Design, Alan B. Marcovitz, McGraw,Hill,0-07-111162-X, New York, 2005

Planned Learning Activities and Teaching Methods

Presentation, Application, Homework, Laboratory

Assessment Methods

SORTING NUMBER SHORT CODE LONG CODE FORMULA
1 MTE MIDTERM EXAM
2 LAB LABORATORY
3 FIN FINAL EXAM
4 FCG FINAL COURSE GRADE MTE * 0.25 + LAB * 0.25 + FIN * 0.50
5 RST RESIT
6 FCGR FINAL COURSE GRADE (RESIT) MTE * 0.25 + LAB * 0.25 + RST * 0.50


*** Resit Exam is Not Administered in Institutions Where Resit is not Applicable.

Further Notes About Assessment Methods

None

Assessment Criteria

LO1, LO2, LO3, LO4, LO5, LO6,and LO7 will be evaluated by a midterm and a final exam, several assignments, experiment performances

Language of Instruction

English

Course Policies and Rules

To be announced.

Contact Details for the Lecturer(s)

Şerife YILMAZ
Dokuz Eylül Üniversitesi
Mühendislik Fakültesi
Bilgisayar Mühendisliği Bölümü
Tınaztepe Kampüsü
Buca/Izmir/ TURKEY

Office Hours

Monday 10.30-12.00

Work Placement(s)

None

Workload Calculation

Activities Number Time (hours) Total Work Load (hours)
Lectures 14 2 28
Tutorials 14 2 28
0
Preparation for midterm exam 1 15 15
Preparation for final exam 1 18 18
Preparations before/after weekly lectures 14 3 42
Preparing assignments 10 2 20
Midterm 1 2 2
Final 1 2 2
TOTAL WORKLOAD (hours) 155

Contribution of Learning Outcomes to Programme Outcomes

PO/LOPO.1PO.2PO.3PO.4PO.5PO.6PO.7PO.8PO.9PO.10
LO.1533
LO.253433
LO.3545333
LO.43535333
LO.55553433
LO.635443433
LO.735533

CONTACT INFORMATION
Dokuz Eylül Üniversitesi Cumhuriyet Bulvarı No: 144 35210 Alsancak / İZMİR
Phone: +90(232) 412 12 12 - Fax: +90 (232) 464 81 35

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