• HOME
• ABOUT US
  • Name Address
  • General Description
  • Governance
  • Academic Calendar
  • Degree Programmes
  • List of Programmes in English
  • General Admission and Registration Procedures
  • Credit Mobility and Recognition of Prior Learning
  • ECTS Credit Allocation
  • Academic Guidance
  • Contacts
• Degree Programmes
  • Third Cycle Programmes (Doctorate Degree)
  • Second Cycle Programmes (Master's Degree)
  • First Cycle Programmes (Bachelor's Degree)
  • Short Cycle Programmes (Associate's Degree)
• GENERAL INFORMATION FOR STUDENTS
  • Cost of Living
  • Accommodation
  • Meals
  • Medical Facilities
  • Facilities for Disabled Students
  • Insurance
  • Financial Supports
  • Student Affairs Office
  • Practical Information for International Students
  • Language Courses
  • Work Placement Possibilities
  • Sports, Social and Cultural Facilities
  • Student Associations and Clubs
  • About İzmir - Turkey
• INTERNATIONAL RELATIONS
  • International Relations Office
  • Registration Procedures
  • Agreements
  • Coordinators
  • Documents
  • List of Programmes in English
  • ECTS / DS Labels

Description of Individual Course Units

Course Unit Code Course Unit Title Type Of Course D U L ECTS BIL 3010 COMPUTER ORGANIZATION COMPULSORY 3 0 0 7

Offered By

Computer Science

Level of Course Unit

First Cycle Programmes (Bachelor's Degree)

Course Coordinator

PROFESSOR DOCTOR MURAT ERŞEN BERBERLER

Offered to

Computer Science

Course Objective

To teach computer architecture concepts.

Learning Outcomes of the Course Unit

1   Have knowledge of basic concepts of computer architecture. 2   Be able to solve problems of computer architecture. 3   Be able to solve computer science problems by using computer architecture concepts. 4   Be able to design efficient algorithms by using computer architecture concepts. 5   Be able to solve problems of different type of disciplines by using concepts of computer architecture.

Mode of Delivery

Face -to- Face

Prerequisites and Co-requisites

BIL 2017 - Digital Design

Recomended Optional Programme Components

None

Course Contents

Week Subject Description 1 Digital Logic Circuits 2 Digital Components 3 Data Representation 4 Register Transfer and Microoperations Quiz 1 5 Basic Computer Organization and Design 6 Programming The Basic Computer 7 Microprogrammed Control 8 Mid-term exam 9 Central Processing Unit 10 Pipeline and Vector Processing 11 Computer Arithmetic 12 Input-Output Organization Quiz 2 13 Memory Organization 14 Multiprocessors

Recomended or Required Reading

Textbook(s): Bilgisayar Sistemleri Mimarisi, M.Morris Mano, ISBN 975-8431-31-5. Supplementary Book(s): Bilgisayar Organizasyonu ve Mimarisi, Cengiz UĞURKAYA, Osman ALIEFENDIOĞLU, Papatya Yayıncılık.

Planned Learning Activities and Teaching Methods

The course is taught in a lecture, class presentation and discussion format. Besides the taught lecture, group presentations are to be prepared by the groups assigned and presented in a discussion session. In some weeks of the course, results of the homework given previously are discussed.

Assessment Methods

SORTING NUMBER SHORT CODE LONG CODE FORMULA 1 VZ Vize 2 FN Final 3 BNS BNS VZ * 0.40 + FN * 0.60 4 BUT Bütünleme Notu 5 BBN Bütünleme Sonu Başarı Notu VZ * 0.40 + BUT * 0.60 *** Resit Exam is Not Administered in Institutions Where Resit is not Applicable.

Further Notes About Assessment Methods

None

Assessment Criteria

To be announced.

Language of Instruction

Turkish

Course Policies and Rules

To be announced.

Contact Details for the Lecturer(s)

murat.berberler@deu.edu.tr

Office Hours

murat.berberler@deu.edu.tr

Work Placement(s)

None

Workload Calculation

Activities Number Time (hours) Total Work Load (hours) Lectures 13 3 39 Preparations before/after weekly lectures 13 6 78 Preparation for midterm exam 1 20 20 Preparation for final exam 1 25 25 Final 1 2 2 Midterm 1 2 2 TOTAL WORKLOAD (hours) 166

Contribution of Learning Outcomes to Programme Outcomes

PO/LO PO.1 PO.2 PO.3 PO.4 PO.5 PO.6 PO.7 PO.8 PO.9 PO.10 PO.11 PO.12 PO.13 LO.1 5 4 5 3 5 4 LO.2 5 4 5 3 5 4 LO.3 5 4 5 3 5 4 LO.4 5 4 5 3 5 4 LO.5 5 4 5 3 5 4