Description of Individual Course Units
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Offered By |
Computer Engineering |
Level of Course Unit |
First Cycle Programmes (Bachelor's Degree) |
Course Coordinator |
ŞERIFE YILMAZ |
Offered to |
Computer Engineering |
Course Objective |
The aim of this course is to give the usage of VHDL.It is expected that students at the end of this course will be able to know a new alternative to increase the system performance using reconfigurable tools with FPGA. |
Learning Outcomes of the Course Unit |
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Mode of Delivery |
Face -to- Face |
Prerequisites and Co-requisites |
None |
Recomended Optional Programme Components |
None |
Course Contents |
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Recomended or Required Reading |
Text Book: |
Planned Learning Activities and Teaching Methods |
Presentation, Application, Homework, Discussion |
Assessment Methods |
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*** Resit Exam is Not Administered in Institutions Where Resit is not Applicable. |
Further Notes About Assessment Methods |
None |
Assessment Criteria |
LO1,LO2,LO3,LO4 and LO5 will be evaluated by a midterm and a final exam and several assigments. |
Language of Instruction |
English |
Course Policies and Rules |
To be announced. |
Contact Details for the Lecturer(s) |
Şerife SUNGUN |
Office Hours |
To be announced. |
Work Placement(s) |
None |
Workload Calculation |
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Contribution of Learning Outcomes to Programme Outcomes |
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