COURSE UNIT TITLE

: COMPUTER SYSTEM ARCHITECTURE

Description of Individual Course Units

Course Unit Code Course Unit Title Type Of Course D U L ECTS
EED 4018 COMPUTER SYSTEM ARCHITECTURE ELECTIVE 3 2 0 6

Offered By

Electrical and Electronics Engineering

Level of Course Unit

First Cycle Programmes (Bachelor's Degree)

Course Coordinator

ASSISTANT PROFESSOR ÖZGÜR TAMER

Offered to

Electrical and Electronics Engineering

Course Objective

Aim of the lesson is to teach computer structures, computer components, component design and hardware processing techniques to the students.

Learning Outcomes of the Course Unit

1   To introduce computer structures
2   To give programming skills about microprocessors
3   To show addressing and address decoding methods
4   To remember basic logic circuits
5   To understand computer systems and components
6   To inform operation systems and software requirements

Mode of Delivery

Face -to- Face

Prerequisites and Co-requisites

None

Recomended Optional Programme Components

None

Course Contents

Week Subject Description
1 Introduction, computer organization and architecture, function and structure
2 Evolution of computers, design and performance considerations
3 Overview of computer components, system buses and interconnections
4 Computer architectures, Von-Neumann and Harward
5 Memory, input/output units, operating system support
6 Instruction methodology, instruction cycle
7 Central Processing Unit I: computer arithmetic, instruction set design
8 Central Processing Unit II: adressing modes, formats
9 Midterm
10 Input- Output organizations
11 Memories and memory organizations
12 Software and operating system organization
13 RISC, CISC
14 Instruction level parallelism

Recomended or Required Reading

Main Reference:
W. Stallings, Computer Organization and Architecture: Designing for Performance, 8th Ed., Prentice Hall, 2009.

Sub-Reference(s):
D.A. Patterson, J.L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, 4th Ed., Morgan Kaufmann, 2008.
M.M. Mano, Computer System Architecture, 3rd Ed., Prentice Hall, 1992Referanslar:
Other : Lecture Notes

Planned Learning Activities and Teaching Methods

In this lesson, fundamental knowledge of the students will be improved by the given literature and with laboratory experiments, some practical hardware implementations will be realized.

Assessment Methods

SORTING NUMBER SHORT CODE LONG CODE FORMULA
1 MTE MIDTERM EXAM
2 ASG ASSIGNMENT
3 PRC PRACTICE
4 FIN FINAL EXAM
5 FCG FINAL COURSE GRADE MTE * 0.20 + ASG * 0.20 + PRC * 0.10 + FIN * 0.50
6 RST RESIT
7 FCGR FINAL COURSE GRADE (RESIT) MTE * 0.20 + ASG * 0.20 + PRC * 0.10 + RST * 0.50


*** Resit Exam is Not Administered in Institutions Where Resit is not Applicable.

Further Notes About Assessment Methods

None

Assessment Criteria

In the midterm and final exams, 1 To introduce computer structures, 4 To remember and apply logic circuit fundamentals; 2 to give programming skills about microprocessors, 3 to show addressing and address decoding methods, 5 to understand computer systems and componets
In the Projects and laboratories, 2 To give simulation skills about logic circuits , 3 to show addressing and address decoding methods, ;

Language of Instruction

English

Course Policies and Rules

To be announced.

Contact Details for the Lecturer(s)

Yard.doç.Dr. Ahmet ÖZKURT
E-Mail: ahmet.ozkurt@ deu.edu.tr Tel: 0232 3017134
Yard.doç.Dr. Özgür TAMER
E-Mail: ozgur.tamer@ deu.edu.tr Tel: 0232 3017134

Office Hours

2 Hours per week

Work Placement(s)

None

Workload Calculation

Activities Number Time (hours) Total Work Load (hours)
Lectures 13 3 39
Tutorials 14 2 28
Preparations before/after weekly lectures 14 3 42
Preparation for final exam 1 10 10
Preparation for midterm exam 1 5 5
Preparing presentations 1 5 5
Preparing assignments 1 5 5
Design Project 2 10 20
Final 1 2 2
Midterm 1 2 2
TOTAL WORKLOAD (hours) 158

Contribution of Learning Outcomes to Programme Outcomes

PO/LOPO.1PO.2PO.3PO.4PO.5PO.6PO.7PO.8PO.9PO.10PO.11PO.12PO.13
LO.1222233222
LO.22222
LO.322
LO.4332
LO.522222
LO.622