Description of Individual Course Units
|
Offered By |
Electrical and Electronics Engineering |
Level of Course Unit |
First Cycle Programmes (Bachelor's Degree) |
Course Coordinator |
PROFESSOR DOCTOR GÜLAY TOHUMOĞLU |
Offered to |
Electrical and Electronics Engineering |
Course Objective |
The goal of this course is to introduce the students the synthesis of circuits which is used in designing circuits and analog filters for continuous time systems, and to equip the students with the abilities of synthesizing one port networks as different RC, RL, RLC and LC circuits, passive /digital filters. Students will use MATLAB programming to synthesis networks and different filters. |
Learning Outcomes of the Course Unit |
||||||||||
|
Mode of Delivery |
Face -to- Face |
Prerequisites and Co-requisites |
EED 2411 - CIRCUIT THEORY II |
Recomended Optional Programme Components |
None |
Course Contents |
|||||||||||||||||||||||||||||||||
|
Recomended or Required Reading |
Text Book: Network Analysis and Synthesis, Franklin F. Kuo, Wiley, India. |
Planned Learning Activities and Teaching Methods |
Lectures+ Homework and/or Quizzes + Exams |
Assessment Methods |
||||||||||||||||||||||||||||
|
Further Notes About Assessment Methods |
None |
Assessment Criteria |
1-Midterm Examinations + Final Exam = MEAN |
Language of Instruction |
English |
Course Policies and Rules |
Regulation s of Faculy of Engineering |
Contact Details for the Lecturer(s) |
E-mail: gulay.tohumoglu@deu.edu.tr |
Office Hours |
It wiıll be anounced at the beginning of the each semester. |
Work Placement(s) |
None |
Workload Calculation |
||||||||||||||||||||||||||||||||||||||||||||||||
|
Contribution of Learning Outcomes to Programme Outcomes |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|